%0 Conference Proceedings %T Integrating System-Level and Code-Level Timing Analysis for Dependable System Development %+ AbsInt GmbH (Angewandte Informatik) %+ Symtavision GmbH %A Ferdinand, C %A Heckmann, R %A Jersak, M %A Martin, F. %A Richter, K %< avec comité de lecture %( ERTS 2008 proceedings %B Embedded Real Time Software and Systems (ERTS2008) %C toulouse, France %8 2008-01-29 %D 2008 %K Schedulability analysis %K timing analy- sis %K worst-case execution time %K worst-case response time %Z Computer Science [cs] %Z Computer Science [cs]/Embedded SystemsConference papers %X Developers of safety-critical real-time systems have to ensure that their systems react within given time bounds. Sophisticated tools for timing analysis at the code-level, controller-level and networked system-level are becoming state-of-the-art for efficient timing verification in light of ever increasing system complexity. This trend is exemplified by two tools: AbsInt’s timing analyzer aiT, which can determine safe upper bounds for the execution times (WCETs) of non-interrupted tasks, and Symtavision’s SymTA/S tool, which computes the worst-case response times (WCRTs) of an en- tire system from the task WCETs and information about possible interrupts and their priorities. The two tools thus complement each other in an ideal way. They have recently been coupled to further in- crease their utility. Starting from a system model, a designer can now seamlessly perform timing bud-geting, performance optimization and timing verification, considering both the code of individual functions, as well as function and sub-system integration. The paper explains and exemplifies various use cases and tool flows. %G English %2 https://insu.hal.science/insu-02270101/document %2 https://insu.hal.science/insu-02270101/file/ERTS2008_0044_paper.pdf %L insu-02270101 %U https://insu.hal.science/insu-02270101 %~ INSU %~ ERTS2008